************************************************************************ ************************************************************************ ** ** ** Application notes for STMicroelectronics devices ** ** ** ** (Informal Document) ** ** ** ** To find the application notes for your device search for the ** ** 'core' part name. As an example using the 25P20 8 pin SOIC you ** ** would search on '25P20' ** ** ** ************************************************************************ ************************************************************************ 25P05 ---------- 25P05A ---------- 25P10 ---------- 25P10A ---------- 25P20 ---------- 1.Four levels of "BLOCK PROTECT" can be implemented for these device as follows: Security Fuse Block Protect Start Addresses SF2 SF1 25P05/A 25P10/A 25P20 ------------- --------- -------------- -------------- 0 0 None None None 0 1 None $18000->$1FFFF $30000->$3FFFF 1 0 None $10000->$1FFFF $20000->$3FFFF 1 1 $0->$FFFF $00000->$1FFFF $00000->$3FFFF 2.Enabling the "Erase EE device" option will remove all block protection. NOTE: Devices require "Erase EE device" option to be enabled when re-programming. 3. Status Register Format: 7 6 5 4 3 2 1 0 |--------|--------|--------|--------|--------|--------|--------|--------| | | | | | | | | | | SRWD | 0 | 0 | 0 | BP1 | BP0 | WEL | WIP | | | | | | | | | | |--------|--------|--------|--------|--------|--------|--------|--------| Address of status register: 25P05/05A : $10000 25P10/10A : $20000 25P20 : $40000 4.Setting the "Program Protect Register" to Yes allows programming of the 'Status Register Write Disable' (SRWD) bit. For enabling "Program Protect Register" in TaskLink for windows(TLwin) or TaskLink for DOS(TLdos) you must set the Enable Special Data #2 option. *********************************************************************** 25P40 ---------- 25P80 ---------- 25P16 (NOTE: 16 pin SOIC support ONLY, see below for 8 pin support) ---------- 25P32 ---------- NOTE: "SFx" Stands for "Security Fuse x" on programmer menu 1.Eight levels of "BLOCK PROTECT" can be implemented for following devices: SF3 SF2 SF1 25P40 25P80 --------------------- ---------------- ---------------- 0 0 0 none none 0 0 1 $70000 - $7FFFF $F0000 - $FFFFF 0 1 0 $60000 - $7FFFF $E0000 - $FFFFF 0 1 1 $40000 - $7FFFF $C0000 - $FFFFF 1 0 0 $00000 - $7FFFF $80000 - $FFFFF 1 0 1 $00000 - $7FFFF $00000 - $FFFFF 1 1 0 $00000 - $7FFFF $00000 - $FFFFF 1 1 1 $00000 - $7FFFF $00000 - $FFFFF SF3 SF2 SF1 25P16 -------------------------------------------------------------------------- BP2 BP1 BP0 Protected Area -------------------------------------------------------------------------- 0 0 0 none (No Protection) 0 0 1 0x1F0000 -> 0x1FFFFF; Upper 32nd (Sector 31) 0 1 0 0x1E0000 -> 0x1FFFFF; Upper sixteenth (2 sectors: 30 and 31) 0 1 1 0x1C0000 -> 0x1FFFFF; Upper eighth (4 sectors: 28 to 31) 1 0 0 0x180000 -> 0x1FFFFF; Upper quarter (8 sectors: 24 to 31) 1 0 1 0x100000 -> 0x1FFFFF; Upper half (16 sectors: 16 to 31) 1 1 0 0x000000 -> 0x1FFFFF; All sectors (32 sectors: 0 to 31) 1 1 1 0x000000 -> 0x1FFFFF; All sectors (32 sectors: 0 to 31) SF3 SF2 SF1 25P32 ------------------------------------------------------- BP2 BP1 BP0 Protected Area ------------------------------------------------------- 0 0 0 NONE 0 0 1 $3F0000 -> $3FFFFF; Upper 64th (Sector 63) 0 1 0 $3E0000 -> $3FFFFF; Upper 32nd (two sectors: 62 and 63) 0 1 1 $3C0000 -> $3FFFFF; Upper sixteenth (four sectors: 60 to 63) 1 0 0 $380000 -> $3FFFFF; Upper eighth (eight sectors: 56 to 63) 1 0 1 $300000 -> $3FFFFF; Upper quarter (sixteen sectors: 48 to 63) 1 1 0 $200000 -> $3FFFFF; Upper half (thirty-two sectors: 32 to 63) 1 1 1 $000000 -> $3FFFFF; All sectors (64 sectors: 0 to 63) 2.Enabling the "Erase EE device" option will remove all block protection. NOTE: Devices require "Erase EE device" option to be enabled when re-programming. 3. Status Register Format: 7 6 5 4 3 2 1 0 |--------|--------|--------|--------|--------|--------|--------|--------| | | | | | | | | | | SRWD | 0 | 0 | BP2 | BP1 | BP0 | WEL | WIP | | | | | | | | | | |--------|--------|--------|--------|--------|--------|--------|--------| Address of status register: 25P40 : $80000 25P80 : $100000 25P32 : $400000 4.Setting the "Program Protect Register" to Yes allows programming of the 'Status Register Write Disable'(SRWD) bit. For enabling "Program Protect Register" in TaskLink for windows(TLwin) or TaskLink for DOS(TLdos) you must set the Enable Special Data #2 option. ************************************************************************ 25P16 ---------- PROGRAMMING OF THE "STATUS REGISTER PROTECT" (SRP) AND "BLOCK PROTECT" (BP2,BP1,BP0) BITS Format of Protection Data in User RAM: 7 6 5 4 3 2 1 0 |--------|--------|--------|--------|--------|--------|--------|--------| | | | | | | | | | | SRWD | 0 | 0 | BP2 | BP1 | BP0 | WEL | WIP | | | | | | | | | | |--------|--------|--------|--------|--------|--------|--------|--------| Applying the following Protection Data into User RAM at the defined User RAM Address and enabling the "Program protect reg." flag in the in the programming operations will allow the following device protection programming support: User RAM Protection Data at User RAM Area Protected for 25P16 Address: 0x200000 (NOTE: Only Applies to 8 pin Support) ------------------ ----------------------------------------- Data: 0x00 = none Data: 0x04 = 0x1F0000 -> 0x1FFFFF Data: 0x08 = 0x1E0000 -> 0x1FFFFF Data: 0x0C = 0x1C0000 -> 0x1FFFFF Data: 0x10 = 0x180000 -> 0x1FFFFF Data: 0x14 = 0x100000 -> 0x1FFFFF Data: 0x18 = 0x000000 -> 0x1FFFFF Data: 0x1C = 0x000000 -> 0x1FFFFF Data: 0x80 = Status Register only Data: 0x84 = Status Register and 0x1F0000 -> 0x1FFFFF Data: 0x88 = Status Register and 0x1E0000 -> 0x1FFFFF Data: 0x8C = Status Register and 0x1C0000 -> 0x1FFFFF Data: 0x90 = Status Register and 0x180000 -> 0x1FFFFF Data: 0x94 = Status Register and 0x100000 -> 0x1FFFFF Data: 0x98 = Status Register and 0x000000 -> 0x1FFFFF Data: 0x9C = Status Register and 0x000000 -> 0x1FFFFF For enabling "Program Protect Reg." in TaskLink for Windows(TLwin) or TaskLink for DOS(TLdos) you must set the Enable Special Data #2 option. ************************************************************************ 95512 ---------- 95256 ---------- *-------------------------------------------------------------------* Device has four levels of "Protected Block" support as defined by the manufacturers data sheet. To Program the Device's Status Register Block Protect Bits refer to the following table: Relatioship between Status Register Protection Bits and the programmer's Security Fuse settings: ---------------------------------------------------------- |Status Register |Programmer Security | Address Range of | | Bits |Fuse Settings | Protected Blocks | | BP1 | BP0 |SF2 | SF1 | 95256 Format: | |------|---------|-----|--------------|--------------------| | 0 | 0 | No | No | None | | 0 | 1 | No | Yes | 6000h -> 7FFFh | | 1 | 0 | Yes | No | 4000h -> 7FFFh | | 1 | 1 | Yes | Yes | 4000h -> 7FFFh | ---------------------------------------------------------- | BP1 | BP0 |SF2 | SF1 | 95512 Format: | |------|---------|-----|--------------|--------------------| | 0 | 0 | No | No | None | | 0 | 1 | No | Yes | C000h -> FFFFh | | 1 | 0 | Yes | No | 8000h -> FFFFh | | 1 | 1 | Yes | Yes | 0000h -> FFFFh | ---------------------------------------------------------- *-------------------------------------------------------------------* To remove all Block Protection you must enabling the "Erase EE device" option. *-------------------------------------------------------------------* To program the 'Status Register Write Disable'(SRWD) bit you must enable "Special Data #2" option in TaskLink for windows(TLwin) or TaskLink for DOS(TLdos). For the Terminal interface you must enable the "Program Protect Reg." Flag. *-------------------------------------------------------------------* The Protection status of the device can be read into the programmer's User RAM. The format of the Status Register data is defined by the manufacturers data sheet as follows: 7 6 5 4 3 2 1 0 ----------------------------------------------------------------------- | | | | | | | | | | SRWD | 0 | 0 | BP2 | BP1 | BP0 | WEL | WIP | | | | | | | | | | ----------------------------------------------------------------------- The Non-volatile Bits that are programmed and read back by the programmer are: SRWD = Status Register Write Protect BP1,BP0 = Block Protect Bits Performing a Load operation reads and stores the Status Register Protection Bits into the following address locations in User RAM: 95256 = Address $8000 95512 = Address $10000 ************************************************************************ ************************************************************************