Device Register description:
Status Register:
  Bit        Name                               Settings:    
   7         Status Register Write Disable      0: Not Write-Protected (Default), 1: Write-Protected
   6         QE - Quad Bit                      0: Disabled (Default), 1: Enabled
  5-2        BP[3:0]                            See Protected Area table

Function Register
  Bit        Name                               Settings:    
   7         IRL3 - Lock the Info Row           0: IRow3 can be programmed (Default), 1: IR can not be programmed (OTP)
   6         IRL2 - Lock the Info Row           0: IRow2 can be programmed (Default), 1: IR can not be programmed (OTP)
   5         IRL1 - Lock the Info Row           0: IRow1 can be programmed (Default), 1: IR can not be programmed (OTP)
   4         IRL0 - Lock the Info Row           0: IRow0 can be programmed (Default), 1: IR can not be programmed (OTP)
   1         Top/Bottom Selection (TBS)         0: Top (Default), 1: Bottom (OTP)