Device Register description:
Status Register 1:
  Bit        Name                            Settings:    
   7         Status Reg Write Disable(SRWD)  0: No Protection(Default), 1: Locks state of SRWD, BP, and Configuration Register-1 bits
  4-2        BP[2:0]                         (Default 000) See Protected Area table

Configuration Register 1:
  Bit        Name                            Settings:    
  7-6        LC[1:0] Latency Code            (Default 00) See Latency Code Tables
   5         BP Start (TBPROT)               0: BP starts at top(Default), 1: BP starts at bottom(OTP)
   3         BP Non-Volatile (BPNV)          0: BP is Non-Volatile(Default), 1: BP is Volatile(OTP)
   1         Quad I/O Mode                   0: Disabled(Default), 1: Enabled

AutoBoot Register
  Bit        Name                            Settings:    
 31-9        AutoBoot Start Address
  8-1        AutoBoot Start Delay
   0         AutoBoot Enable                 0: Disabled(default), 1: Enabled

Advanced Sector Protection Register:
  Bit        Name                            Settings:
 15-5        Reserved for future use         (Default 1) Reserved(OTP)
   4         DYB Lock Boot Bit               0 = All DYB power-up in the protected state (Permanently Enabled)
   3         PPB OTP Bit                     0 = PPB bits are OTP (Permanently Enabled)
   2         Password Protection Mode        0: Enabled(OTP), 1: Disabled(Default)
   1         Persistent Protection Mode      0: Enabled(OTP), 1: Disabled(Default)
   0         Reserved for future use         (Default 1) Reserved(OTP)

Data Learning Register
  Bit        Name                            Settings:    
  7-0        Data Learning Pattern (NVDLP)   Data Learning Pattern(OTP)

Password Register:
  Bit        Name                            Settings:    
 63-0        64 bit hidden password          64-bit Password (OTP)

1024-byte OTP Address Space (Secure Silicon Region):
    The OTP address space is divided into 32, individually lockable, 32-byte regions, indexed (31-0).
    Regions 31-1 are blank when shipped from the factory and function as 32-byte, lockable OTP areas.
    Region 0 however contains a 128 bit random number and the lock bits for regions (31-0).
    The lowest 16 bytes in region 0 (address 0xF - 0x0) contain a 128 bit random number programmed by Cypress.
    The next 4 bytes in region 0 (address 0x13 - 0x10) are the Lock bits for OTP regions 31-0.
    The remaining 12 bytes in region 0 (address 0x1F - 0x14) are (Reserved for future use).
    Only the 4 Lock bytes in region 0 (address 0x13 - 0x10) can be programmed, any other data provided for region 0 will be ignored.

TBPROT:
The desired state of the TBPROT bit must be selected during the initial configuration of the device,
before the first program or erase operation on the main flash array. 
The TBPROT bit must not be programmed after programming or erasing is done in the main flash array. 

Advanced Sector Protection:
    All Persistent Protection Bits (PPB) are modified to be One Time Programmable (OTP). 
    After a PPB bit is programmed, the related sector is permanently protected. PPB bits are not erasable.
    There is a Persistent Protection bit register is assigned to each 256KB block in memory.
    PPB registers default to 0xFF
    Setting the PPB register of a sector/block to 0x00 will permanently protect the data in that sector/block from modification.

    The device has 256 PPB registers, indexed 0 - 255 on each die of the device

    To set a single PPB register, enter its index
    Example: To set PPB at index 13, enter 13

    To set a range of PPB registers, separate the low and high register indexes with a hyphen
    Example: To set PPB at indexes 3 - 17, enter 3-17

    To specify multiple indexes or ranges, separate the indexes or ranges with a comma
    Example: To set PPB at indexes 13, 22-27, 31-40 and 47, enter 13,22-27,31-40,47

Password Register:
The password register is OTP, attempts to reprogram or erase the register will fail.
If the password register of the device has already been programmed, the correct password must be provided for verification.
If the device is in password protection mode, the correct password must be provided to unlock programming of the Persistent Protection bits.

This device may have factory lock OTP regions in Region 1, 2, and 3.