Device Register description:
Status Register 1 (Address 0xA0):
  Bit        Name                           Settings:    
   7         Status Register 1 Protect 0    See Software & Hardware Protection table
  6-3        Block Protect Bits[3:0]        See Protected Area table
   2         Top/Bottom Protect Bits        See Protected Area table
   1         Write Protection Enable Bit    See Software & Hardware Protection table
   0         Status Register 1 Protect 1    See Software & Hardware Protection table

Configuration Register (Address 0xB0):
  Bit        Name                           Settings:    
   5         Status Register 1 Lock         0: Unlocked Status Register 1, 1: Locks Status Register 1 Values as new default values (OTP)

When Status Register 1 is locked with values that may protect portions of memory, device is unable to re-program flash memory.

Please select the appropriate Bad Block Management Scheme for either a Write-and-Verify operation or a Verify-Only operation.

For Write-and-Verify jobs, ensure that the Erase operation is enabled to allow proper block preparation prior to programming.

The Read From Master function does not apply any Bad Block Handling method; it performs a raw NAND read and retrieves all data regions, including blocks marked as bad.

When selecting a region variant, read the choice selection carefully for the correct desired image layout.

This device has 2048 blocks, indexing from 0 to 2047.